The M6 Pro and M6 Max could use SoIC-MH and WMCM, although Apple has not yet confirmed them
Apple could keep the M6 Pro and M6 Max within its plans despite rumors that pointed to a direct jump towards the M7 generation. The new information comes from the semiconductor supply chain and places the focus on two TSMC advanced packaging technologies: SoIC-MH and WMCM. Both would allow more complex processors to be built from several matrices connected within the same package.
The existence of these chips is not yet confirmed. Apple has only presented the basic M6. The known data explains how the higher models could be manufactured if they finally reach the market, without providing specific dates, specifications or devices.
SoIC-MH would improve communication between dies
Apple’s most powerful processors have begun to abandon large single dies to distribute their components among various pieces of silicon. This modular construction allows you to combine specialized blocks and expand the processor’s capacity without relying on a single large chip. It also requires very fast connections for the system to function as a single unit.
SoIC-MH would be responsible for increasing the density of these connections. TSMC’s SoIC family allows integrating dies manufactured with different sizes, functions and even production nodes. By reducing the distance between them, signals travel a shorter path, a characteristic that can improve bandwidth, latency and energy consumption.
In some Pro and Max variants, this type of packaging would allow expand the blocks of CPU, GPU, memory and interfaces, maintaining fast communication between them. The information available does not detail how many matrices each model would use or how it would distribute its different components. It only points out SoIC-MH as the planned solution to interconnect them with greater density.
WMCM would bring together logic, memory and high-speed connections
WMCM, acronym for Wafer-Level Multi-Chip Modulewould fulfill a different function. Its task would be to integrate the logic matrices, the LPDDR memory and the high-speed inputs and outputs in the same package. In this way, SoIC-MH would manage the closest communication between the silicon pieces and WMCM would help bring the complete assembly together.
The manufacturing process would follow a method called RDL-First. The redistribution layer that conducts the signals is created before the arrays are placed. This order allows you to prepare the connections first and then use parts that have already passed their functional checks. The importance of materials intended to join, protect and insulate components also increases.
Apple already uses multi-die designs in its largest processors. The possible combination of SoIC-MH and WMCM would expand that approach and allow each block to be organized more freely. For now this is an industry forecast, so its specific effects on performance, temperature or efficiency are not yet known.
TSMC prepares capacity to manufacture more WMCM packages
The production chain would also be adapting to a greater demand for these technologies. The Zhunan AP6 plant would continue as the main SoIC manufacturing center, while Longtan AP3 would upgrade some of its equipment used with InFO to produce WMCM packages. Chiayi AP7 would assume capacity for both techniques and other advanced processes such as CoWoS.
Estimates place WMCM’s monthly capacity at around 60,000 units at the end of 2026. During 2027 it could exceed 120,000 units per month. These figures correspond to the entire production and do not represent an order placed by Apple.
The only confirmed member of the new generation is the M6. Apple manufactures it using a 2 nanometer process and has debuted it in the Mac mini. It features a 12-core CPU, a 12-core GPU, two 16-core Neural Engines, and support for a maximum of 32 GB of unified memory.
Its memory bandwidth reaches 170 GB/s. This is the official figure for the processor and replaces the 240 GB/s that appeared in previous leaks. Apple has not explained whether future higher variants will share the same base or directly adopt a modular construction.
At the other extreme is the M5 Ultra presented for the Mac Studio. Apple uses UltraFusion to join two M5 Max composed, in turn, of two matrices. The result is the company’s first quad-die architecture, with up to 36 CPU cores, 80 GPU cores, and 1.2 TB/s of memory bandwidth.
This design shows that Apple already has a modular base for its highest-performance processors. SoIC-MH and WMCM could carry that strategy into the next generation, although the possible packaging does not by itself confirm the products that will use it. As of today, Apple has not announced the M6 Pro or M6 Max and there is no official date for their launch.
