AMD prepares Medusa Halo for 2027 with up to 26 Zen 6 cores, RDNA 5 graphics equivalent to an RTX 5070 Ti and LPDDR6 support

AMD prepares Medusa Halo for 2027 with up to 26 Zen 6 cores, RDNA 5 graphics equivalent to an RTX 5070 Ti and LPDDR6 support

For weeks the idea that AMD had thrown in the towel with Jellyfish Halo. The latest leak goes just in the opposite direction: the project is still going and, if there are no changes, would see the light in 2027 as the most ambitious APU in the house. The information comes from Moore’s Law is Dead, one of the voices with the best radar for the upcoming hardware.

Zen 6 in chiplets and latest batch lithographs

The base of Medusa Halo would be Zen 6 in chiplet format. The CCDs (the CPU blocks) would be manufactured in the process TSMC N2P (the “latest” node provided for that time window), while the I/O die (the input/output chip that coordinates memory, PCIe, etc.) would remain in N3P, also from TSMC.

The “series” design would speak of 12 high-performance Zen 6 cores accompanied by 2 Zen 6 LP cores (low power) Designed for light tasks and energy savings. And there would be an upper step with an extra 12-core CCD: in total, 24 “fat” cores and up to 26 if we count those two LPs. It’s a lot of muscle for an APU and, above all, a sign of where AMD wants to push the “all-in-one” concept.

If the CPU block attracts attention, the integrated GPU is not far behind. The leak points to 48 Compute Units based on RDNA 5 with 20 MB L2 cache. To put it in context, Strix Halo (the current reference) stays at 40 CU. That 20% jump in gross units, added to architectural improvements, would place performance in the orbit of a GeForce RTX 5070 Ti, always with the asterisk that we are talking about estimates and that memory bandwidth and drivers will have the last word. Even so, it is a figure that makes one think of laptops or mini-PCs without a dedicated GPU capable of playing serious games without embarrassment.

Memory: bandwidth to height

Such a GPU feeds on bandwidth, and here AMD does not seem to want to fall short. Medusa Halo would contemplate two configurations: LPDDR6 at 384 bits or LPDDR5X at 256 bits. The first is, on paper, what should allow RDNA 5 to be sustained without bottlenecks; The second makes perfect sense for equipment where the objective is to balance consumption, cost and thermal design. In both cases, the idea is clear: give the iGPU the flow it needs to avoid falling into the typical “it has plenty of CU but drowned by memory.”

Medusa Halo Mini: the version for thin and SFF laptops

In addition to the “large” model, there would be a Medusa Halo Mini variant Designed for laptops and compact computers. The distribution of nuclei would be different: 4 Zen 6, 8 Zen 5c (the “compact” cores of the previous generation, efficient and dense) and 2 Zen 6 LP, for 14 total. The graphics would drop to 24 CU RDNA 5 with 10 MB of L2. In memory, It would start from LPDDR5X at 128 bits with the possibility of going up to LPDDR6 at 192 bits depending on configuration. Translated: less brute than its older sister, but with enough margin for a slim team that does not want to give up playing or decent creative loads.

Geeknetic AMD prepares Medusa Halo for 2027 with up to 26 Zen 6 cores, RDNA 5 graphics equivalent to an RTX 5070 Ti and LPDDR6 2 support

What does this mean if the plan is fulfilled?

If all these pieces fit, Medusa Halo would take the APU concept to a new place: up to 26 Zen 6 CPU cores, RDNA 5 with mid-high range dedicated GPU numbers, generous caches and memory controllers designed for high bandwidth. It would not be a “patch” to not mount a dGPU: it would be a real option for many scenarios where today we are still tied to the separate CPU+GPU combo.

There are two long years ahead and many engineering decisions in between, so it’s wise to maintain healthy skepticism: manufacturing nodes may move, configurations may be trimmed or expanded, and brand names will almost certainly change. But the direction is clear. AMD wants us, when we think about APUs, to stop imagining something “compromising” and start to visualize compact equipment with real performance.